USB3.0 can provide a data rate of up to 5Gbps, which is ten times faster than high-speed USB(USB2.0) and has improved power efficiency. At this high transmission speed, the signal integrity problem restricts the PCB routing and wiring length and its design and implementation function more and more strictly. Poor signal quality may seriously affect the system performance and reliability. The USB3.0ReDriverSuperspeed used in terminal equipment is a dual-channel memory (TX and RX) and multi-channel USB3.0 adapter driver, which is used in terminal equipment such as notebook, desktop computer, docking station, side board and wiring. Each secure channel provides an optional balance setting to compensate for different input routing losses.
USB3.0 design manual
1. decoupling capacitor of VDD. it is suggested to place a decoupling capacitor of 0.1uF on each vdd pin of IC. The bottom is a reasonable layout reference for placing decoupling capacitors on the circuit board. The four decoupling capacitors with pink circles at the bottom are located around the four VDD pins (pins 6,10,16 and 20) of the IC.
2.PCB layer It is suggested that at least four layers of PCB should be used for USB3.0 design. Each data information signal trace should be thoroughly wired on the ground plane of the adjacent layer, so as to meet the requirements of characteristic impedance measurement.
3. Route along the USB connector.
Usb socket connector used on PCB when designing USB circuit board motherboard. For Vbus wiring, it is proposed to insert ferrite beads. For the shielding of USB connector (shielding of USB cable), AC is isolated from the ground (such as a moderate value of inductance, instead of immediately connecting the signal line shielding layer to the ground structure of PCB).
For USB3.0 signal wiring, the characteristic impedance should be maintained. Prevent cross-cutting and delete any wiring that causes signal discontinuity and serious EMC noise problems. In addition, when pins are inserted into PCB, do not place any isolation between all USB3.0 signal pairs on each layer.
Crosstalk in the middle of signal traces
USB3.0 has three pairs of signals (SSTX±/SSRX±/D± D), which
There are three typical types of far-end crosstalk:
SSTX± to d in RX mode
Sst x to SSRX±
D to SSRX± in TX mode
In order to minimize the crosstalk problem, the wiring of SSTX±/SSRX± and D to the intermediate signal lines cannot be closed with each other. Characteristic impedance of USB3.0 signal routing The reasonable layout around the USB3.0 socket connector is placed as one or several reference planes in a special layer (such as GND layer). In order to maintain the differential characteristic impedance of high-speed signal traces, please ensure that no copper is cut in the middle of any differential pair. The GND layer of the second layer of USB3.0 is hollowed out, and the SS signal differential pair is designed in the high layer, which will cause the problem of signal discontinuity, and the pins on the USB3.0 socket connector will become the lead stub.
4. Wire around the USB controller tightly.
Because the high-speed signal is sensitive to the switching power supply signal, care must be taken to design the switching power supply and grounding device of USB controller reasonably. As in part (a), each switch power supply pin must be decoupled from the capacitor, which should be as close to the switch power supply pin of USB controller as possible. Because USB controller includes analog and digital parts, it is necessary to simulate switching power supply and digital switching power supply system. In order to prevent the interference of digital signals from causing common faults in digital integrated circuits, we should try our best to pay attention to the isolation between analog switching power supply and digital signal wiring (including signal wiring). For analog power and digital power of the same voltage level, ferrite beads should be added during the period for noise filter.
PCB design summary
Reasonable layout design:
The USB controller and USB connector should be as close as possible to reduce the length of wiring. Magnetic beads and decoupling capacitors used to decouple and remove high-frequency noise interference should be placed as close to the USB connector as possible.
The terminal matching resistor should be placed as close to one end of USB controller as possible.
The voltage regulator should also be placed as close to the connector as possible.
Wiring design:
Try to reduce the wiring length, give priority to the wiring of high-speed USB differential lines, and try to prevent the high-speed USB differential lines and any connectors and digital signal lines with steep edges from approaching the wiring.
Try to reduce the number of vias and corners on the USB high-speed signal line, so as to ensure the manipulation of characteristic impedance and prevent signal reflection.
It is strictly forbidden to use 90 turning angle, two 45-degree turning angles or an arc, which will greatly reduce the signal reflection and the discontinuity of characteristic impedance.
Do not run the signal line under the crystal oscillator circuit, crystal, clock synthesizer, IC with magnetic components and clock memory overclocking.
Prevent stub from appearing on the signal line, otherwise it may cause signal reflection, and then affect the integrity of the signal. If the short pile line is inevitable, make sure its length does not exceed 50mils.
Try to walk the high-speed signal lines in the same layer. Ensure that there is a detailed undivided mirror plane (VCC or GND, first choose GND plane) in the relative path of the trace. If possible, don’t go beyond the dividing line of the mirror plane (such as the dividing line of different switching power supplies on the switching power supply plane), otherwise it may raise the self-inductance and enlarge the radiation of the signal.
Differential signal lines are wired side by side.
Differential signal wiring
The wiring spacing between parallel USB differential signal pairs should ensure the differential characteristic impedance of 90ohms.
Reduce the length of high-speed USB signal line running side by side with high-speed clock line and AC signal, or increase their side-by-side spacing, so as to reduce the influence of crosstalk. Ensure that the distance between differential pair signals and other signal traces is at least 50mils.
The tight coupling mode is adopted in the middle of differential signals, that is, the distance between traces is lower than the total width of traces, which can improve the working ability of differential signals against external noise interference. The actual wire spacing and total width must be determined according to the relevant mobile phone software.
It is best to ensure that the distance between the two traces of differential signals is consistent everywhere, and to ensure the length matching, the large length difference (such as the length difference between DP and DM) should not exceed 50mils.
Length matching is more critical than keeping the spacing consistent everywhere. Therefore, length matching should be ensured first, and signal traces can be routed in places where the spacing between traces cannot be kept consistent, so as to ensure that the lengths of the two traces are consistent.