1、 Preface
At present, high-speed PCB design is widely used in the fields of communication, computer, graphics and image processing. All high-tech value-added electronic product designs pursue the characteristics of low power consumption, low electromagnetic radiation, high reliability, miniaturization and lightweight. In order to achieve the above goals, PCB via design is an important factor in high-speed PCB design.
It is composed of hole, pad area around the hole and power layer isolation area. It is usually divided into blind hole, buried hole and through-hole.In the process of PCB design, through the analysis of parasitic capacitance and inductance of vias, some points for attention in the design of high-speed PCB vias are summarized.
1. Via
Via is an important factor in the design of multi-layer PCB. A via is mainly composed of three parts;The second is the pad area around the hole;Third, power layer isolation area.The process of through-hole is to coat a layer of metal on the cylindrical surface of the hole wall by chemical deposition to connect the copper foil in the middle. The upper and lower sides of the through hole are made into common pad shape, which can be directly connected with the lines on the upper and lower sides or not.Or can be connected to an electrical via hole.
Through holes are generally divided into three types: blind hole, buried hole and through-hole.
1) Blind hole refers to a certain depth located on the top and bottom surface of printed circuit board. It is used for the connection of surface circuit and inner circuit. The depth and diameter of hole usually do not exceed a certain ratio.
2) Buried hole refers to the connecting hole in the inner layer of printed circuit board, which does not extend to the surface of the circuit board.
Blind hole and buried hole are located in the inner layer of circuit board. Before lamination, through-hole molding process is used to complete, and several inner layers may be overlapped in the process of via forming.
3) Through holes, which pass through the entire circuit board, can be used for internal interconnection or as installation positioning holes for components.Because the through-hole is easier to realize in the process and has lower cost, it is generally used in PCB.
2. Parasitic capacitance of via
The via itself has parasitic capacitance to the ground. If the diameter of the isolation hole on the ground layer of the via is D2, the diameter of the via pad is D1, the thickness of the PCB is T, and the dielectric constant of the substrate is ε, the parasitic capacitance of the via is similar to:
C =1.41εTD1/（D2-D1）
The parasitic capacitance of the via will mainly affect the circuit, which is to prolong the rising time of the signal and reduce the speed of the circuit. The smaller the capacitance value, the smaller the impact.
3. Parasitic inductance of via
There is parasitic inductance in the via itself. In the design of high-speed digital circuits, the harm caused by parasitic inductance of the via is often greater than the influence of parasitic capacitance. The parasitic series inductance of the via will weaken the function of the bypass capacitor and the filtering effect of the whole power supply system. If l refers to the inductance of the via, h is the length of the via, and d is the diameter of the central hole, the parasitic inductance of the via is approximately: L=5.08h[ln(4h/d)+1]
It can be seen from the formula that the diameter of the via has little influence on the inductance, while the length of the via has the greatest influence on the inductance.
4. Non-through hole technology
Non-through holes include blind holes and buried holes. In the non-through-the-hole technology, the application of blind holes and buried holes can greatly reduce the size and quality of PCB, reduce the number of layers, improve the electromagnetic compatibility, increase the features of electronic products, reduce the cost, and also make the design work simpler and faster. In the traditional PCB design and processing, through holes will bring many problems. First of all, they occupy a large amount of effective space. Secondly, a large number of through-holes are densely located in one place, which also creates a huge obstacle to the inner wiring of multilayer PCB. These through-holes occupy the space required for wiring, and they densely pass through the surfaces of power supply and ground plane, which will also destroy the impedance characteristics of power supply ground plane and make it invalid. Moreover, the conventional mechanical drilling will be 20 times as much as the non-through-the-pilot drilling.
In PCB design, although the sizes of pads and vias have gradually decreased, if the thickness of the board layer does not decrease proportionally, the aspect ratio of vias will increase, which will reduce the reliability. With the development of advanced laser drilling technology and plasma dry corrosion technology, it is possible to apply non-penetrating blind holes and buried holes. If the diameter of these non-penetrating holes is 0.3mm, the parasitic parameters will be about 1/10 of the original conventional holes, which will improve the reliability of PCB.
Due to the adoption of non-through-the-hole technology, there will be few large vias on the PCB, which can provide more space for wiring. The remaining space can be used for large-area shielding to improve EMI/RFI performance. At the same time, more remaining space can also be used for the inner layer to partially shield devices and key network cables, so that they have the best electrical performance. By using non-through-vias, it is more convenient to fan out the device pins, which makes it easy for high-density pin devices (such as BGA packaged devices) to be wired, shortens the connection length, and meets the timing requirements of high-speed circuits.
5. Selection of via holes in common PCB
In ordinary PCB design, the parasitic capacitance and inductance of vias have little influence on PCB design. For 1-4 layer PCB design, 0.36mm/0.61mm/1.02mm (hole/pad /POWER isolation area) vias are generally preferred, and some special signal lines (such as power line, ground line and clock line) can be 0.41mm/0.81mm/1.
6. Design of via holes in high-speed PCB
Through the above analysis of parasitic characteristics of vias, we can see that in high-speed PCB design, seemingly simple vias often bring great negative effects to circuit design. In order to reduce the adverse effects caused by parasitic effects of vias, the following can be done as much as possible in the design:
(1) Select reasonable via size.For Multilayer PCB with general density, it is better to select 0.25mm/0.51mm/0.91mm (drilling / pad / power isolation zone);For some high-density PCB, 0.20mm/0.46mm/0.86mm vias can also be used, and non threading holes can be tried;For the vias of power supply or ground wire, larger size can be considered to reduce the impedance;
(2) The larger the power isolation area is, the better. Considering the via density on PCB, it is generally D1 = D2 + 0.41;
(3) In other words, vias should be reduced as much as possible;
(4) Using thinner PCB can reduce the two parasitic parameters of via;
(5) The pins of power supply and ground should be close to the via. The shorter the lead between the via and the pin is, the better, because they will increase the inductance.At the same time, the power and ground leads should be as thick as possible to reduce the impedance;
(6) Some grounding vias are placed near the vias of signal layer change to provide short distance circuit for signals.
Of course, the PCB design also needs specific analysis of specific issues.Considering the cost and signal quality, designers always hope that the smaller the via is, the better, so that more wiring space can be left on the board. In addition, the smaller the via is, the smaller its parasitic capacitance is, which is more suitable for high-speed circuit.In the design of high-density PCB, the use of non perforating pilot hole and the reduction of via size bring about the increase of cost. Moreover, the size of via hole can not be reduced without limit. It is limited by the drilling and electroplating technology of PCB manufacturers. Therefore, balanced consideration should be given to the via design of high-speed PCB.